1. Field of the Invention
The present invention relates to a semiconductor device having a metal wiring.
2. Description of the Related Art
As a conventional method of manufacturing a semiconductor device, there is a method shown in FIGS. 1 and 2.
In this manufacturing method, at first as shown in FIG. 1, an opening 202a is formed in an interlayer dielectric film (interlayer insulation film) 202 on a semiconductor substrate 201. A Ti (Titanium) film 204, a TiN (Titanium nitride) film 206 and a W (tungsten)-film are embedded in the opening 202a. Then, an etch-back process or a CMP (Chemical Mechanical Polishing) process is carried out, thereby holding those films in the opening 202a and forming a W (tungsten) plug 208.
Next, so as to cover the whole of the interlayer dielectric film 202, the Ti film 204, the TiN film 206 and the W-plug 208, a Ti film 210 and a TiN film 212 are formed as a barrier metal. Then, an Al (aluminum) wiring 214, a Ti film 216 and a TiN film 218 are formed in turn on the TiN film 212. Next, as shown in FIG. 2, a dry etching process is carried out, thereby partially removing those films and forming an Al wiring 214. In this way, since the barrier metal is designed so as to have a lamination structure of the Ti film 210 and the TiN film 212, it is possible to improve the migration resistance property of the wiring layer formed.on the surface of the TiN film 212 and further improve the adhesive property to the wiring layer.
However, in the foregoing process, when the Al wiring is formed, a damage portion 222 caused by side-etching may be induced in the Ti film 210 that contacted with the W-plug 208. This damage portion 222 results in the increase in a contact resistance between the W-plug 208 and the Ti film 210 so that the electrical connection between them is decreased.
Japanese Laid-open Patent Application JP-P2004-39879A discloses a technique to solve this problem. In the technique, a W-plug is formed in an interlayer dielectric film so that an upper surface of the W-plug is higher than a surface of this interlayer dielectric film. Then, so as to cover the interlayer dielectric film and the W-plug, a Ti film and a TiN film are formed in turn as a barrier metal. Then, only the barrier metal (TiN film/Ti film) on the W-plug is removed by using a CMP process.
Also, Japanese Laid-Open Patent Application JP-P2004-14763A discloses a semiconductor device where a TiN film of a single layer is formed on a surface of a W-plug and a surface of an interlayer dielectric film.
However, we have now discovered that the conventional techniques disclosed in the foregoing applications have room for improvement with regard to the following points.
Firstly, the method in JP-P2004-39879A is required to form the fine W-plug with excellent controllability and further required to remove only the barrier metal formed on the W-plug. For this reason, it is very difficult to obtain the high reproducibility and excellent controllability. Further, there is still a case that the side of the Ti film in contact with the W-plug is etched in an etching process when the Al wiring is formed. Thus, the contact resistance between the W-plug and the Ti film is increased, which decreases the electrical connection. Moreover, a process for removing the barrier metal formed on the W-plug and the like are required, which increases the number of manufacturing processes and the manufacturing costs.
Secondly, in the semiconductor device disclosed in JP-P2004-14763A, the film formation property of the wiring layer formed on the surface of the TiN film is reduced, which may decrease the yield. In particular, in the case that the wiring layer is the Al wiring layer, the reduction in the film formation property is severe.
In this way, in the semiconductor device having the W-film, the semiconductor device is desired of which the simple method can be used to protect the side etching of the barrier metal film and improve the electrical connection between the W-film and the barrier metal film. Moreover, the semiconductor device is desired which can improve the film formation property of the wiring layer.